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Nordic Semiconductor nRF5 CPU Support Package
This package contains project templates and system files for the Nordic Semiconductor nRF5.
CrossWorks Version 4 Installation Instructions
- To install this support package
-
- Click the Tools > Package Manager menu option to open the package manager window.
- Right click on the Nordic Semiconductor nRF5 CPU Support Package entry and select Install Selected Packages.
- Click Next to take you to the summary page.
- Click Next to install the package.
- Click Finish to close the package manager window.
- Click the Tools > Show Installed Packages.
- Click on the Nordic Semiconductor nRF5 CPU Support Package link to view the package and its contents.
- To manually install this support package
-
- If you have not done so already, follow the CMSIS 3 Support Package and CrossWorks Tasking Library Package installation instructions.
- Download the file nRF51.hzq using your web browser.
- Click the Tools > Manually Install Packages menu option.
- Select the file you have just downloaded to install the package.
- Click the Tools > Show Installed Packages.
- Click on the Nordic Semiconductor nRF5 CPU Support Package link to view the package and its contents.
- To install this support package using other versions
Release Notes
3.5
- Fix RAM sizes in memory maps for nRF52832 devices.
- Add support for nRF52840 devices.
- Supplied header files from nRF5 SDK v12.2.0.
3.4
- Add support for production nRF52832 devices.
- Supplied latest version of CMSIS header and system files.
3.3
- Changed name of nRF52832 to nRF52832_xxAA to match j-link name.
- Supplied latest version of CMSIS header and system files.
3.2
- Added support for nRF51422_xxxx and nRF52832 devices.
- Removed flash placements for SoftDevices.
3.1
- Removed errant sample links, samples are in board support package.
- Added support for nRF51822_xxAC device.
- CTL timer now optionally uses RTC1.
3.0
- Added flash placements for SoftDevices.
- Changed name of target devices to match j-link names.
- Supplied latest CMSIS header files.
- For existing projects you will need to reselect the Target property.
1.2
- Supplied latest version of CMSIS header files.
1.1
- Added support for erasing/flashing the UICR area.
- Uses RTC0 rather than TIMER0 to implement the CTL timer and now implements ctl_sleep() and ctl_woken() functions.
- Supplied CTL test10.c that use ctl_sleep() and ctl_woken() functions.
1.0
- Initial Release.
Documentation
Creating nRF5 Projects
To create a new nRF5 project
- Select the File > New > New Project menu item.
- Select the appropriate Generic nRF51 from the Categories list.
- Select the required project template type from the Templates list.
- Set the required project name and location directory.
- Click OK.
To build and debug an application the runs in Flash memory
- Select the project to work on by using the Project > Set Active Project menu option.
- Select the configuration you require by using the Build > Set Active Build Configuration menu option.
- Right click on the project node in the project explorer and select the Flash placement property.
- Build the project by using the Build > Build Project menu option.
- Connect to the appropriate target in the target window.
- Download and start debugging the current project by using Debug > Start Debugging.
To make the application startup from reset
- Right click on the project node in the project explorer and select Properties...
- In the properties window scroll down to the Preprocessor Options section.
- Type STARTUP_FROM_RESET into the Preprocessor Definitions property editor.
To make the application work with a soft device
- Right click on the project node in the project explorer and select Properties...
- Use the search box to find "Additional Load File[0]", set this property to the soft device hex filename.
- Use the search box to find "Entry Point Symbol" in "Debugger Options" change this to nonexistent to make the debugger start execution in the soft device.
- Use the search box to find "Section Placement Macros" and set FLASH_START=0x1f000 and SRAM_START=0x20002800 to the approriate values required of the soft device.
- Use the search box to find "Erase All" and set this to "Yes" so that the UICR area is erased.
nRF5 Project Specifics
Target Processor
Once a project has been created you can select different target processors by right clicking on the project node in the project explorer and selecting the Target Processor entry.
Selecting the target processor will specify the memory map that is used for the build and debug. You can view the selected memory map by right clicking on the project node in the project explorer and selecting Edit Memory Map.
Section Placement
CrossStudio for ARM supports nRF5 projects running applications in a number of different memory configurations. You can select the memory configuration you require by setting the Section Placement property.
For nRF5 projects the set of placements are:
- Flash application runs in internal Flash memory.
- RAM application runs internal RAM memory.
Stack and Heap Sizes
The default stack and heap sizes are set to be 2048 and 0 bytes by default when a project is created.
Target Startup Code
The startup code nRF51_Startup.s is common to all nRF51 processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to a weak symbol SystemInit with the stack pointer set to the top of the first block of SRAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code as such it cannot access initialised static data.
The startup code declares symoblic names (and weak implementations) for each interrupt service routine, for example the POWER_CLOCK_IRQHandler function will be called when this interrupt occurs. If you are porting code that has application specific interrupt service routine names then you can use the preprocessor definitions to rename the symbol for example POWER_CLOCK_IRQHandler=MyPOWER_CLOCK_IRQHandlerISR.
Target Reset Script
The reset script nRF51_Target.js is used by the debugger to reset the target board.
Memory Simulator
An nRF51 memory simulator is provided that simulates the memories of the various nRF5 devices. The memory simulation parameter (which is set by the Target Processor selection) specifies the device name, the size of the internal Flash and RAM memories.
CMSIS support
CMSIS header files and library are referenced as part of the new project setup. The Nordic Semiconductor CMSIS files
are supplied.CTL support
The file nRF51_ctl.c implements the CTL system timer using the nRF51 RTC or (for the nRF52) the SysTick timer. The timer is configured to interrupt at (approximately for the RTC) a 10 millisecond rate and increment the CTL system timer by 10 to give a millisecond timer.
The CTL interrupt support functions ctl_global_interrupts_set, ctl_set_priority, ctl_unmask_isr and ctl_mask_isr are implemented in this file. The implementation uses the lowest half of the available NVIC priorities (top bit set in the priority) for CTL interrupts.