NXP LPC4300 CPU Support Package
This package contains project templates and system files for the NXP LPC4300.
CrossWorks Version 3 Installation Instructions
- To install this support package
-
- Click the Tools > Package Manager menu option to open the package manager window.
- Right click on the NXP LPC4300 CPU Support Package entry and select Install Selected Packages.
- Click Next to take you to the summary page.
- Click Next to install the package.
- Click Finish to close the package manager window.
- Click the Tools > Show Installed Packages.
- Click on the NXP LPC4300 CPU Support Package link to view the package and its contents.
- To manually install this support package
-
- If you have not done so already, follow the CMSIS 5 CMSIS-Core(M) Support Package, CMSIS 5 CMSIS-DSP Support Package, CMSIS 5 Support Package and CrossWorks Tasking Library Package installation instructions.
- Download the file LPC4300_V3.hzq using your web browser.
- Click the Tools > Manually Install Packages menu option.
- Select the file you have just downloaded to install the package.
- Click the Tools > Show Installed Packages.
- Click on the NXP LPC4300 CPU Support Package link to view the package and its contents.
- To install this support package using other versions
Release Notes
3.7
- Changed intermediate and output directory names for CM0 projects to enable parallel building.
- New projects will use CMSIS-Core property group to select CMSIS headers.
3.6
- Fixed flash loader problem corrupting flash bank A when flash bank B is written.
3.5
- Added Device Name to CM0 property group selection for jlink support.
3.4
- Added support for LPC4367 and LPC43S67 devices.
3.3
- Improved reset script for ETB/ETM support.
- Changed default stack and help sizes to 1024.
3.2
- Added support for LPC43Sxx devices.
3.1
- Improved reset script.
- Include builds of SPIFI and CFI loader.
3.0
- Initial release - if you have an existing project reselect the Target Processor property.
Documentation
Creating LPC4300 Projects
To create a new LPC4300 project
- Select the File > New > New Project menu item.
- Select the required Generic LPC4300 from the Project Type list.
- Select the LPC4300 Executable project template type from the Templates list.
- Set the required project name and location directory.
- Click OK.
To build, load and debug an application running in internal RAM
- Select the project to work on by using the Project | Set Active Project menu option.
- Select the RAM placement by clicking on the project node in the project explorer.
- Build the project by using the Build | Build Project menu option.
- Connect to the appropriate target in the target window.
- Download and start debugging the current project by using Debug | Start Debugging.
To build, load and debug an application running in internal Flash.
- Select the project to work on by using the Project | Set Active Project menu option.
- Select the Flash A placement by clicking on the project node in the project explorer.
- Build the project by using the Build | Build Project menu option.
- Connect to the appropriate target in the target window.
- Download and start debugging the current project by using Debug | Start Debugging.
To make the application startup from reset
- Right click on the project node in the project explorer and select Properties...
- In the properties window scroll down to the Preprocessor Options section.
- Type STARTUP_FROM_RESET into the Preprocessor Definitions property editor.
LPC4300 Project Specifics
CMSIS support
CMSIS header files are included as part of the new project setup.
- LPC43xx.h LPC43xx specific header file.
Memory Simulator
An memory simulator is provided that simulates the memories of the various LPC4300 devices. The memory simulation parameter specifies the device name and the sizes of the SPIFI and the 4 static memories as macro values that can be defined with the memory simulation parameter macros project property.
Memory Map Files
Memory map files are provided for each target. The memory map files use memory map macros to specify the sizes of external memories and to apportion the memory ranges between the CM4 and CM0 processor.
The following memory map macros can be set:
- SRAM1_CM0_SIZEThe size of SRAM1 reserved for the CM0.
- SRAM2_CM0_SIZEThe size of SRAM2 reserved for the CM0.
- SPIFI_SIZEThe size of SPIFI memory.
- SPIFI_CM0_SIZEThe size of SPIFI memory reserved for the CM0.
- FLASHA_CM0_SIZEThe size of FLASH A reserved for the CM0.
- FLASHB_CM0_SIZEThe size of FLASH B reserved for the CM0.
- CS0_SIZEThe size of CS0 memory.
- CS0_CM0_SIZEThe size of CS0 memory reserved for the CM0.
- CS1_SIZEThe size of CS1 memory.
- CS1_CM0_SIZEThe size of CS1 memory reserved for the CM0.
- CS2_SIZEThe size of CS2 memory.
- CS2_CM0_SIZEThe size of CS2 memory reserved for the CM0.
- CS3_SIZEThe size of CS3 memory.
- CS3_CM0_SIZEThe size of CS3 memory reserved for the CM0.
- AHBSRAM1_CM0_SIZEThe size of AHB SRAM1 reserved for the CM0.
- AHBSRAM2_CM0_SIZEThe size of AHB SRAM2 reserved for the CM0.
- DYCS0_SIZEThe size of DYCS0 memory.
- DYCS0_CM0_SIZEThe size of DYCS0 memory reserved for the CM0.
- DYCS1_SIZEThe size of DYCS1 memory.
- DYCS1_CM0_SIZEThe size of DYCS1 memory reserved for the CM0.
Section Placement
CrossStudio for ARM supports LPC4300 projects running applications in a number of different memory configurations. You can select the memory configuration you require by right clicking on the project node in the project explorer and selecting the Placement entry.
For LPC4300 projects the set of placements are:
- EMC application runs in external memory.
- EMC Copy To RAM application boots from external memory into local SRAM.
- Flash A application runs in internal flash memory bank A.
- Flash A Copy to RAM application boots from internal flash memory bank A into local SRAM.
- Flash B application runs in internal flash memory bank B.
- Flash B Copy to RAM application boots from internal flash memory bank B into local SRAM.
- RAM application runs in local SRAM.
- SDRAM application runs in external SDRAM.
- SPIFI application runs in SPIFI memory.
- SPFI Copy To RAM application boots from SPIFI memory into local SRAM.
Stack and Heap Sizes
The stack and heap sizes are set to be 1024 bytes by default when a project is created. It is likely that you will need to change these values.
Target Reset Script
The reset script LPC4300_Target.js is used by the debugger to reset the target board.
Target Startup Code
The startup code LPC4300_Startup.s and LPC4300_CM0_Startup.s are common to all LPC4300 processors. There are a set of preprocessor defines that configure the startup code and are documented in the startup file itself. The startup code calls out to a weak symbol SystemInit with the stack pointer set to the top of RAM. The SystemInit function can be used to set the CPU clock or configure any external memories prior to the C initialisation code and as such it cannot access initialised static data.
The startup code LPC4300_CM0SUB_Startup.s is specific to the Cortex-M0 SUBSYSTEM of the LPC4370.